Invention Grant
- Patent Title: Epitaxial semiconductor layer and method
- Patent Title (中): 外延半导体层及方法
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Application No.: US12757617Application Date: 2010-04-09
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Publication No.: US07898062B2Publication Date: 2011-03-01
- Inventor: Paul A. Farrar
- Applicant: Paul A. Farrar
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman, Lundberg & Woessner, P.A.
- Main IPC: H01L29/207
- IPC: H01L29/207 ; H01L29/227 ; H01L29/167 ; H01L21/762 ; H01L21/04 ; H01L21/265
Abstract:
A method for epitaxially forming a first semiconductor structure attached to a second semiconductor structure is provided. Devices and methods described include advantages such as reduced lattice mismatch at an epitaxial interface between two different semiconductor materials. One advantageous application of such an interface includes an electrical-optical communication structure. Methods such as deposition of layers at an elevated temperature provide easy formation of semiconductor structures with a modified lattice constant that permits an improved epitaxial interface.
Public/Granted literature
- US20100193838A1 EPITAXIAL SEMICONDUCTOR LAYER AND METHOD Public/Granted day:2010-08-05
Information query
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