Invention Grant
US07898083B2 Method for low stress flip-chip assembly of fine-pitch semiconductor devices
有权
微型间距半导体器件的低应力倒装芯片组装方法
- Patent Title: Method for low stress flip-chip assembly of fine-pitch semiconductor devices
- Patent Title (中): 微型间距半导体器件的低应力倒装芯片组装方法
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Application No.: US12361768Application Date: 2009-01-29
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Publication No.: US07898083B2Publication Date: 2011-03-01
- Inventor: Abram M Castro
- Applicant: Abram M Castro
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Yingsheng Tung; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40
Abstract:
A device including a first body (101) with terminals (102) on a surface (101a), each terminal having a metallic connector (110), which is shaped as a column substantially perpendicular to the surface. Preferably, the connectors have an aspect ratio of height to diameter of 2 to 1 or greater, and a fine pitch center-to-center. The connector end (110a) remote from the terminal is covered by a film (130) of a sintered paste including a metallic matrix embedded in a first polymeric compound. Further a second body (103) having metallic pads (140) facing the respective terminals (102). Each connector film (130) is in contact with the respective pad (140), whereby the first body (101) is spaced from the second body (103) with the connector columns (110) as standoff. A second polymeric compound (150) is filling the space of the standoff.
Public/Granted literature
- US20100148374A1 METHOD FOR LOW STRESS FLIP-CHIP ASSEMBLY OF FINE-PITCH SEMICONDUCTOR DEVICES Public/Granted day:2010-06-17
Information query
IPC分类:
