An integrated circuit includes a trigger signal generating unit configured to generate a trigger signal for setting a control unit connected thereto in a reset state, an input unit configured to input a DC voltage of a predetermined voltage value, a pulse signal generating unit configured to generate and output a pulse signal with the predetermined voltage value to a power supply unit configured to generate a voltage to be supplied to the control unit with a coil and a capacitor, a detecting unit configured to detect generation of an event which requires an output of the trigger signal, a stopping unit configured to stop outputting of the pulse signal based on a detection result from the detecting unit, and an output unit configured to output the trigger signal generated by the trigger signal generating unit after outputting of the pulse signal is stopped and a predetermined condition is satisfied.