Invention Grant
US07898297B2 Method and apparatus for dynamic threshold voltage control of MOS transistors in dynamic logic circuits
有权
用于动态逻辑电路中MOS晶体管的动态阈值电压控制的方法和装置
- Patent Title: Method and apparatus for dynamic threshold voltage control of MOS transistors in dynamic logic circuits
- Patent Title (中): 用于动态逻辑电路中MOS晶体管的动态阈值电压控制的方法和装置
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Application No.: US11684466Application Date: 2007-03-09
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Publication No.: US07898297B2Publication Date: 2011-03-01
- Inventor: Ashok Kumar Kapoor , Robert Strain , Reuven Marko
- Applicant: Ashok Kumar Kapoor , Robert Strain , Reuven Marko
- Applicant Address: US CA Los Gatos
- Assignee: Semi Solution, LLC
- Current Assignee: Semi Solution, LLC
- Current Assignee Address: US CA Los Gatos
- Agency: Glenn Patent Group
- Agent Michael A. Glenn
- Main IPC: H03K19/096
- IPC: H03K19/096

Abstract:
Metal-oxide semiconductor (MOS) transistors that are operable at voltages below 1.5V, that are area efficient, and that exhibit improved drive strength and leakage current that are disclosed. A dynamic threshold voltage control scheme is used that does not require a change to existing MOS technology processes. Threshold voltage of the transistor is controlled, such that in the Off state, the threshold voltage of the transistor is set high, keeping the transistor leakage to a small value. The advantages provided by apply to dynamic logic, as well as in the specific well separation imposed by design rules because well potential difference are lower than the supply voltage swing.
Public/Granted literature
- US20070229145A1 Method and Apparatus for Dynamic Threshold Voltage Control of MOS Transistors in Dynamic Logic Circuits Public/Granted day:2007-10-04
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