An analog signal processing device including a voltage selector selecting a given comparison reference voltage from plural comparison reference voltages, an arithmetic unit arithmetically processing the given comparison reference voltage and an analog input signal, a comparator which has at least one or more judgment points for the plural comparison reference voltages and to which an output of the arithmetic unit is inputted, and a coupling controller controlling connections between the arithmetic unit and the comparator, wherein the arithmetic unit comprises correctable first signal processors, and the number of the first signal processors is more than is necessary for the plural comparison reference voltages by M or larger, and when a set of N of first signal processors are in a correction operation, the coupling controller connects first signal processors which are not in the correction operation in the arithmetic unit to the comparator.