Invention Grant
- Patent Title: Circuit and method for generating word line off voltage
- Patent Title (中): 产生字线关断电压的电路和方法
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Application No.: US12327588Application Date: 2008-12-03
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Publication No.: US07898897B2Publication Date: 2011-03-01
- Inventor: Jun-Gi Choi
- Applicant: Jun-Gi Choi
- Applicant Address: KR Gyeonggi-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2008-0063166 20080630
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
A circuit and method for generating a word line off voltage which can minimize a leakage current by actively adjusting a level of the word line off voltage. The circuit includes a current information provider for providing information about an amount of current flowing through a cell transistor, and a voltage generator for generating a word line off voltage with a varying level depending on the information.
Public/Granted literature
- US20090323438A1 CIRCUIT AND METHOD FOR GENERATING WORD LINE OFF VOLTAGE Public/Granted day:2009-12-31
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