Invention Grant
- Patent Title: Method for controlling clock cycle time for reduced power consumption in a semiconductor memory device
- Patent Title (中): 控制半导体存储器件中降低功耗的时钟周期时间的方法
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Application No.: US12790607Application Date: 2010-05-28
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Publication No.: US07898901B2Publication Date: 2011-03-01
- Inventor: Debra M. Bell , Paul A. Silvestri
- Applicant: Debra M. Bell , Paul A. Silvestri
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman, Lundberg & Woessner, P.A.
- Main IPC: G11C8/18
- IPC: G11C8/18 ; H03L7/06
Abstract:
Some embodiments include a delay line configured to apply a delay to an input signal to provide an output signal; an input circuit configured to provide the input signal based on a first signal, such that the cycle time of the input signal is different from a cycle time of the first signal; an output circuit configured to provide a second signal based on the output signal, the second signal having a cycle time different from a cycle time of the output signal; and a controller configured to adjust the delay to control a timing relationship between the first signal and the second signal. Other embodiments are described and claimed.
Public/Granted literature
- US20100237916A1 DELAY LOCKED LOOP WITH FREQUENCY CONTROL Public/Granted day:2010-09-23
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