Invention Grant
- Patent Title: Phase error correction circuit and receiver incorporating the same
- Patent Title (中): 相位误差校正电路和接收器相结合
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Application No.: US12003933Application Date: 2008-01-03
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Publication No.: US07899139B2Publication Date: 2011-03-01
- Inventor: Hideki Nakahara , Koichiro Tanaka , Kenichi Mori , Yoshio Urabe , Hitoshi Takai
- Applicant: Hideki Nakahara , Koichiro Tanaka , Kenichi Mori , Yoshio Urabe , Hitoshi Takai
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Wenderoth, Lind & Ponack, L.L.P.
- Priority: JP2002-311393 20021025
- Main IPC: H04L27/06
- IPC: H04L27/06

Abstract:
A detected signal 111 contains a preamble portion which includes symbol alternations, followed by a unique word portion, and a data portion. Each time a symbol alternation is detected, a correction value calculation section 102 averages the phase shift in the detected signal 111 for a predetermined length, thereby calculating a correction value 115. The correction value determination section 103 stores a plurality of correction values 115 in a chronological order. When the unique word portion is detected, the correction value determination section 103 retains, as an effective correction value 118, a correction value which is arrived at by going back a predetermined number of correction values among the stored correction values. A phase rotation section 104 corrects the phase of the detected signal 111 by using an effective correction value 118 calculated by the correction value determination section 103.
Public/Granted literature
- US20080118010A1 Phase error correction circuit and receiver incorporating the same Public/Granted day:2008-05-22
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