Invention Grant
US07899145B2 Circuit, system, and method for multiplexing signals with reduced jitter 有权
具有减少抖动的信号复用的电路,系统和方法

Circuit, system, and method for multiplexing signals with reduced jitter
Abstract:
An apparatus having a plurality of power supply domains and a plurality of logic components. Each of the plurality of logic components residing within a different one of the plurality of power supply domains. Each of the plurality of logic components is configured to operate with a corresponding clock signal within a respective one of the plurality of power supply domains.
Information query
Patent Agency Ranking
0/0