Invention Grant
- Patent Title: Recording and displaying logic circuit simulation waveforms
- Patent Title (中): 记录和显示逻辑电路仿真波形
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Application No.: US10452260Application Date: 2003-06-02
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Publication No.: US07899659B2Publication Date: 2011-03-01
- Inventor: David Tester
- Applicant: David Tester
- Applicant Address: US CA Milpitas
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA Milpitas
- Agent Christopher P. Maiorana, PC
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A method for generating a compressed representation of a simulated waveform is disclosed. The method may have the steps of: (a) processing circuit model information, (b) identifying a segment of stable repetition; and (c) generating the compressed representation. Step (a) may generate waveform information representing a simulated waveform occurring in the circuit model. Step (b) may identify the segment in the waveform information. In step (c), the compressed waveform information may define the segment by (i) cycle information representing the waveform cycle and (ii) repetition information representing the stable repetitions of the waveform cycle to form the segment.
Public/Granted literature
- US20040243372A1 Recording and displaying logic circuit simulation waveforms Public/Granted day:2004-12-02
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