Invention Grant
- Patent Title: Scan chain architecture for increased diagnostic capability in digital electronic devices
- Patent Title (中): 扫描链架构，可提高数字电子设备的诊断能力
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Application No.: US11963036Application Date: 2007-12-21
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Publication No.: US07900103B2Publication Date: 2011-03-01
- Inventor: Marco Casarsa
- Applicant: Marco Casarsa
- Applicant Address: IT Agrate Brianza (MI)
- Assignee: STMicroelectronics S.R.L.
- Current Assignee: STMicroelectronics S.R.L.
- Current Assignee Address: IT Agrate Brianza (MI)
- Agency: Allen, Dyer, Doppelt, Milbrath & Gilchrist, P.A.
- Agent Lisa K. Jorgenson
- Priority: EP06026788 20061222
- Main IPC: G01R31/3177
- IPC: G01R31/3177 ; G01R31/40
Abstract:
A scan chain architecture includes a cascade of flip-flop cells each having at least one input and output or an inverted output. The output or inverted output of a flip-flop is connected to the input of the subsequent flip-flop. The connection between two consecutive flip-flops of the scan chain is selected according to the status of a given flip-flop cell, the status of a previous cell, and the status of the connection between these cells.
Public/Granted literature
- US20080155365A1 SCAN CHAIN ARCHITECTURE FOR INCREASED DIAGNOSTIC CAPABILITY IN DIGITAL ELECTRONIC DEVICES Public/Granted day:2008-06-26
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