Invention Grant
- Patent Title: Debug circuit and a method of debugging
- Patent Title (中): 调试电路和调试方法
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Application No.: US12028440Application Date: 2008-02-08
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Publication No.: US07900113B2Publication Date: 2011-03-01
- Inventor: Peter Hunt , Andrew J. Pickering , Tom Leslie
- Applicant: Peter Hunt , Andrew J. Pickering , Tom Leslie
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent John R. Pessetto; W. James Brady; Frederick J. Telecky, Jr.
- Priority: GB0702597.6 20070209
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G06F11/00
Abstract:
A debug circuit for a multi-mode circuit driven by a clock signal, with an input for a clock signal, and a debug signal generator arranged to generate for each of a subset of the modes of the multi-mode circuit a corresponding debug signal based on a clock signal provided at the input. The frequency of debug signals is dependent on the frequency of a clock signal provided at the input, and each debug signal selects its respective mode for a length of time longer than that of each other mode of the multi-mode circuit, or each debug signal selects its respective mode for a length of time shorter than that of each other mode of the multi-mode circuit.
Public/Granted literature
- US20080215947A1 Debug Circuit and a Method of Debugging Public/Granted day:2008-09-04
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