Invention Grant
- Patent Title: Integrated circuit micro-module
- Patent Title (中): 集成电路微模块
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Application No.: US12479707Application Date: 2009-06-05
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Publication No.: US07901981B2Publication Date: 2011-03-08
- Inventor: Peter Smeys , Peter Johnson , Peter Deane
- Applicant: Peter Smeys , Peter Johnson , Peter Deane
- Applicant Address: US CA Santa Clara
- Assignee: National Semiconductor Corporation
- Current Assignee: National Semiconductor Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Beyer Law Group LLP
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01L21/50 ; H01L21/48 ; H01L21/44

Abstract:
Various methods for forming an integrated circuit micro-module are described. In one aspect of the invention, layers of an epoxy are sequentially deposited over a substrate to form planarized layers of epoxy over the substrate. The epoxy layers are deposited using spin coating. At least some of the layers are photolithographically patterned after they are deposited and before the next epoxy layer is deposited. Openings are formed in at least some of the patterned epoxy layers after they are patterned and before the next epoxy layer is deposited. An integrated circuit is placed within one of the openings. At least one of the epoxy layers is deposited after the placement of the integrated circuit to cover the integrated circuit. At least one conductive interconnect layer is formed over an associated epoxy layer. Multiple external package contacts are formed. The integrated circuit is electrically connected with the external package contacts at least in part through one or more of the conductive interconnect layers.
Public/Granted literature
- US20100216280A1 INTEGRATED CIRCUIT MICRO-MODULE Public/Granted day:2010-08-26
Information query
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