Invention Grant
- Patent Title: Integrated circuit micro-module
- Patent Title (中): 集成电路微模块
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Application No.: US12479715Application Date: 2009-06-05
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Publication No.: US07901984B2Publication Date: 2011-03-08
- Inventor: Peter Smeys , Peter Johnson , Peter Deane
- Applicant: Peter Smeys , Peter Johnson , Peter Deane
- Applicant Address: US CA Santa Clara
- Assignee: National Semiconductor Corporation
- Current Assignee: National Semiconductor Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Beyer Law Group LLP
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01L21/50 ; H01L21/48 ; H01L21/44

Abstract:
Various apparatuses and methods for forming integrated circuit packages are described. One aspect of the invention pertains to a method for forming a microsystem and one or more passive devices in the microsystem. Layers of epoxy are sequentially deposited over a substrate to form multiple planarized layers of epoxy over the substrate. The epoxy layers are deposited by spin coating. At least some of the epoxy layers are photolithographically patterned after they are deposited and before the next epoxy layer is deposited. An integrated circuit having multiple I/O bond pads is placed on an associated epoxy layer. At least one conductive interconnect layer is formed over an associated epoxy layer. A passive component is formed within at least one of the epoxy layers. The passive component is electrically coupled with the integrated circuit via at least one of the interconnect layers. Multiple external package contacts are formed. The integrated circuit is electrically connected to the external package contacts at least partly through one or more of the conductive interconnect layers. Various embodiments pertain to apparatuses that are formed by performing some or all of the aforementioned operations.
Public/Granted literature
- US20100213602A1 INTEGRATED CIRCUIT MICRO-MODULE Public/Granted day:2010-08-26
Information query
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