Invention Grant
- Patent Title: Self-aligned in-laid split gate memory and method of making
- Patent Title (中): 自对准嵌入式分闸门存储器及其制作方法
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Application No.: US12181766Application Date: 2008-07-29
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Publication No.: US07902022B2Publication Date: 2011-03-08
- Inventor: Sung-Taeg Kang , Jane A. Yater
- Applicant: Sung-Taeg Kang , Jane A. Yater
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent James L. Clingan, Jr.
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
A method includes forming a silicon nitride layer and patterning it to form a first opening and a second opening separated by a first portion of silicon nitride. Gate material is deposited in the first and second openings to form first and second select gate structures in the first and second openings. Second and third portions of silicon nitride layer are removed adjacent to the first and second gate structures, respectively. A charge storage layer is formed over the semiconductor device after removing the second and third portions. First and second sidewall spacers of gate material are formed on the charge storage layer and adjacent to the first and second gate structures. The charge storage layer is etched using the first and second sidewall spacers as masks. The first portion is removed. A drain region is formed in the semiconductor layer between the first and second gate structures.
Public/Granted literature
- US20100029052A1 SELF-ALIGNED IN-LAID SPLIT GATE MEMORY AND METHOD OF MAKING Public/Granted day:2010-02-04
Information query
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