Invention Grant
US07902027B2 Method of manufacturing a semiconductor device including recessed-channel-array MOSFET having a higher operational speed
有权
制造具有较高工作速度的凹槽式阵列MOSFET的半导体器件的制造方法
- Patent Title: Method of manufacturing a semiconductor device including recessed-channel-array MOSFET having a higher operational speed
- Patent Title (中): 制造具有较高工作速度的凹槽式阵列MOSFET的半导体器件的制造方法
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Application No.: US12604006Application Date: 2009-10-22
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Publication No.: US07902027B2Publication Date: 2011-03-08
- Inventor: Hirohisa Yamamoto
- Applicant: Hirohisa Yamamoto
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Young & Thompson
- Priority: JP2006-222158 20060817
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
A semiconductor device includes a recessed-channel-array MOSFET including a gate electrode having a portion received in a recess. The gate insulting film has a first portion made of silicon oxide in contact with the sidewall of the recess and a second portion made of silicon oxynitride in contact with the bottom of the recess. The first portion has an equivalent oxide thickness larger than the equivalent oxide thickness of the second portion to reduce the parasitic capacitance of the gate electrode.
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