Invention Grant
- Patent Title: Process for fabricating a structure for epitaxy without an exclusion zone
- Patent Title (中): 用于制造没有排除区的外延结构的方法
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Application No.: US12134019Application Date: 2008-06-05
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Publication No.: US07902045B2Publication Date: 2011-03-08
- Inventor: Chantal Arena , Fabrice Letertre
- Applicant: Chantal Arena , Fabrice Letertre
- Applicant Address: FR Bernin
- Assignee: S.O.I.Tec Silicon on Insulator Technologies
- Current Assignee: S.O.I.Tec Silicon on Insulator Technologies
- Current Assignee Address: FR Bernin
- Agency: Winston & Strawn LLP
- Priority: FR0755512 20070606
- Main IPC: H01L21/30
- IPC: H01L21/30
Abstract:
A process for fabricating a composite structure for epitaxy, including at least one crystalline growth seed layer of semiconductor material on a support substrate, with the support substrate and the crystalline growth seed layer each having, on the periphery of their bonding face, a chamfer or an edge rounding zone. The process includes at least one step of wafer bonding the crystalline growth seed layer directly onto the support substrate and at least one step of thinning the crystalline growth seed layer. After thinning, the crystalline growth seed layer has a diameter identical to its initial diameter.
Public/Granted literature
- US20080303118A1 PROCESS FOR FABRICATING A STRUCTURE FOR EPITAXY WITHOUT AN EXCLUSION ZONE Public/Granted day:2008-12-11
Information query
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