Methods for discretized formation of masking and capping layers on a substrate

Invention Grant

US07902063B2 Methods for discretized formation of masking and capping layers on a substrate 有权

Title translation: 在衬底上离散形成掩蔽层和覆盖层的方法

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Patent Title: Methods for discretized formation of masking and capping layers on a substrate
Patent Title (中): 在衬底上离散形成掩蔽层和覆盖层的方法
Application No.: US11352083

Application Date: 2006-02-10
Publication No.: US07902063B2

Publication Date: 2011-03-08
Inventor: Tony P. Chiang , David E. Lazovsky , Thomas R. Boussie , Alexander Gorer
Applicant: Tony P. Chiang , David E. Lazovsky , Thomas R. Boussie , Alexander Gorer
Applicant Address: US CA San Jose
Assignee: Intermolecular, Inc.
Current Assignee: Intermolecular, Inc.
Current Assignee Address: US CA San Jose
Main IPC: H01L21/4763
IPC: H01L21/4763

Methods for discretized formation of masking and capping layers on a substrate

Abstract:

The present invention provides methods and systems for discretized, combinatorial processing of regions of a substrate such as for the discovery, implementation, optimization, and qualification of new materials, processes, and process sequence integration schemes used in integrated circuit fabrication. A substrate having an array of differentially processed regions thereon is processed by delivering materials to or modifying regions of the substrate.

Abstract(Chinese):

本发明提供了用于基板区域的离散化，组合处理的方法和系统，例如用于集成电路制造中使用的新材料，工艺和工艺顺序集成方案的发现，实现，优化和鉴定。通过将材料输送到衬底或修改衬底的区域来处理其上具有差分处理区域阵列的衬底。

Public/Granted literature

US20070082485A1 Methods for discretized formation of masking and capping layers on a substrate Public/Granted day:2007-04-12

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/34	...具有H01L21/06，H01L21/16及H01L21/18各组不包含的或有或无杂质，例如掺杂材料的半导体的器件
H01L21/46	....用H01L21/36至H01L21/428各组不包含的方法或设备处理半导体材料的（在半导体材料上制作电极的入H01L21/44）
H01L21/461	.....改变半导体材料的表面物理特性或形状的，例如腐蚀、抛光、切割
H01L21/4763	......非绝缘层的沉积，例如绝缘层上的导电层、电阻层；这些层的后处理（电极的制造入H01L21/28）