Invention Grant
- Patent Title: Small area, robust silicon via structure and process
- Patent Title (中): 小面积,坚固的硅通过结构和工艺
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Application No.: US11833112Application Date: 2007-08-02
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Publication No.: US07902069B2Publication Date: 2011-03-08
- Inventor: Paul S Andry , John M Cotte , John Ulrich Knickerbocker , Cornelia K Tsang
- Applicant: Paul S Andry , John M Cotte , John Ulrich Knickerbocker , Cornelia K Tsang
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Michael Buchenhorner; Vazken Alexanian
- Main IPC: H01L21/44
- IPC: H01L21/44

Abstract:
A semiconductor structure includes: at least one silicon surface wherein the surface can be a substrate, wafer or other device. The structure further includes at least one electronic circuit formed on each side of the at least one surface; and at least one conductive high aspect ratio through silicon via running through the at least one surface. Each through silicon via is fabricated from at least one etch step and includes: at least one thermal oxide dielectric for coating at least some of a sidewall of the through silicon via for a later etch stop in fabrication of the through silicon via.
Public/Granted literature
- US20090032951A1 Small Area, Robust Silicon Via Structure and Process Public/Granted day:2009-02-05
Information query
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