Invention Grant
US07902571B2 III-V group compound semiconductor device including a buffer layer having III-V group compound semiconductor crystal
有权
III-V族化合物半导体器件包括具有III-V族化合物半导体晶体的缓冲层
- Patent Title: III-V group compound semiconductor device including a buffer layer having III-V group compound semiconductor crystal
- Patent Title (中): III-V族化合物半导体器件包括具有III-V族化合物半导体晶体的缓冲层
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Application No.: US11302282Application Date: 2005-12-14
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Publication No.: US07902571B2Publication Date: 2011-03-08
- Inventor: Ryota Isono , Takashi Takeuchi
- Applicant: Ryota Isono , Takashi Takeuchi
- Applicant Address: JP Tokyo
- Assignee: Hitachi Cable, Ltd.
- Current Assignee: Hitachi Cable, Ltd.
- Current Assignee Address: JP Tokyo
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2005-227168 20050804
- Main IPC: H01L29/66
- IPC: H01L29/66

Abstract:
A field effect transistor (FET) with high withstand voltage and high performance is realized by designing a buffer layer structure appropriately to reduce a leakage current to 1×10−9 A or less when a low voltage is applied. An epitaxial wafer for a field effect transistor comprising a buffer layer 2, an active layer, and a contact layer on a semi-insulating substrate 1 from the bottom, and the buffer layer 2 includes a plurality of layers, and a p-type buffer layer composed of p-type AlxGa1-xAs (0.3≦x≦1) is provided as a bottom layer (undermost layer) 2a. A Nd product of a film thickness of the p-type buffer layer and a p-type carrier concentration of the p-type buffer layer is within a range from 1×1010 to 1×1012/cm2.
Public/Granted literature
- US20070029640A1 III- V group compound semiconductor device Public/Granted day:2007-02-08
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