Invention Grant
US07902607B2 Fabrication of local damascene finFETs using contact type nitride damascene mask
失效
使用接触式氮化物镶嵌掩模制造局部大马士革finFET
- Patent Title: Fabrication of local damascene finFETs using contact type nitride damascene mask
- Patent Title (中): 使用接触式氮化物镶嵌掩模制造局部大马士革finFET
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Application No.: US12318238Application Date: 2008-12-23
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Publication No.: US07902607B2Publication Date: 2011-03-08
- Inventor: Yong-Sung Kim , Tae-Young Chung
- Applicant: Yong-Sung Kim , Tae-Young Chung
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2005-0108796 20051114
- Main IPC: H01L21/331
- IPC: H01L21/331

Abstract:
Disclosed are methods for forming FinFETs using a first hard mask pattern to define active regions and a second hard mask to protect portions of the insulating regions between active regions. The resulting field insulating structure has three distinct regions distinguished by the vertical offset from a reference plane defined by the surface of the active regions. These three regions will include a lower surface found in the recessed openings resulting from the damascene etch, an intermediate surface and an upper surface on the remaining portions of the lateral field insulating regions. The general correspondence between the reference plane and the intermediate surface will tend to suppress or eliminate residual gate electrode materials from this region during formation of the gate electrodes, thereby improving the electrical isolation between adjacent active regions and improving the performance of the resulting semiconductor devices.
Public/Granted literature
- US20090121292A1 Fabrication of local damascene finFETs using contact type nitride damascene mask Public/Granted day:2009-05-14
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