Invention Grant
US07902638B2 Semiconductor die with through-hole via on saw streets and through-hole via in active area of die
有权
半导体模具,带有通孔,通孔在通道上,通孔通孔在模具的有效区域
- Patent Title: Semiconductor die with through-hole via on saw streets and through-hole via in active area of die
- Patent Title (中): 半导体模具,带有通孔,通孔在通道上,通孔通孔在模具的有效区域
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Application No.: US11861251Application Date: 2007-09-25
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Publication No.: US07902638B2Publication Date: 2011-03-08
- Inventor: Byung Tai Do , Heap Hoe Kuan , Linda Pei Ee Chua
- Applicant: Byung Tai Do , Heap Hoe Kuan , Linda Pei Ee Chua
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group
- Agent Robert D. Atkins
- Main IPC: H01L23/544
- IPC: H01L23/544

Abstract:
A semiconductor wafer contains a plurality of die with contact pads disposed on a first surface of each die. Metal vias are formed in trenches in the saw street guides and are surrounded by organic material. Traces connect the contact pads and metal vias. The metal vias can be half-circle vias or full-circle vias. Metal vias are also formed through the contact pads on the active area of the die. Redistribution layers (RDL) are formed on a second surface of the die opposite the first surface. Repassivation layers are formed between the RDL for electrical isolation. The die are stackable and can be placed in a semiconductor package with other die. The vias through the saw streets and vias through the active area of the die, as well as the RDL, provide electrical interconnect to the adjacent die.
Public/Granted literature
- US20080272465A1 Semiconductor Die with Through-Hole Via on Saw Streets and Through-Hole Via in Active Area of Die Public/Granted day:2008-11-06
Information query
IPC分类: