Invention Grant
- Patent Title: Semiconductor arrangement and method for producing a semiconductor arrangement
- Patent Title (中): 用于制造半导体装置的半导体装置和方法
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Application No.: US11388327Application Date: 2006-03-23
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Publication No.: US07902683B2Publication Date: 2011-03-08
- Inventor: Frank Pueschner , Erik Heinemann , Stephan Janka
- Applicant: Frank Pueschner , Erik Heinemann , Stephan Janka
- Applicant Address: DE
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE
- Agency: Dickstein Shapiro LLP
- Priority: DE102005013500 20050323
- Main IPC: H01L23/06
- IPC: H01L23/06
Abstract:
A semiconductor arrangement having at least one semiconductor chip, which has, on one surface, an integrated circuit and at least one contact element which is electrically conductively connected to the latter, and having an edge protector, which at least partially covers an edge region on the surface of the semiconductor, the edge region extending along outer edges of the semiconductor chip. A method for manufacturing the above-mentioned semiconductor arrangement.
Public/Granted literature
- US20060278958A1 Semiconductor arrangement and method for producing a semiconductor arrangement Public/Granted day:2006-12-14
Information query
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