Invention Grant
- Patent Title: Voltage drop measurement circuit
- Patent Title (中): 电压降测量电路
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Application No.: US11759375Application Date: 2007-06-07
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Publication No.: US07902844B2Publication Date: 2011-03-08
- Inventor: Toshiyuki Matsunaga
- Applicant: Toshiyuki Matsunaga
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Young & Thompson
- Priority: JP2006-158071 20060607
- Main IPC: G01R27/08
- IPC: G01R27/08
Abstract:
A voltage drop measurement circuit includes a voltage drop circuit to generate an output voltage and fluctuate the output voltage according to a fluctuation in a power supply voltage, where the output voltage being the power supply voltage dropped by a predetermined amount and a flip-flop to retain a flag indicating a drop in the power supply voltage according to the output voltage.
Public/Granted literature
- US20070296421A1 VOLTAGE DROP MEASUREMENT CIRCUIT Public/Granted day:2007-12-27
Information query
