Invention Grant
US07902858B2 Calibration circuit, semiconductor device including the same, and memory module
有权
校准电路,包括其的半导体器件和存储器模块
- Patent Title: Calibration circuit, semiconductor device including the same, and memory module
- Patent Title (中): 校准电路,包括其的半导体器件和存储器模块
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Application No.: US12216676Application Date: 2008-07-09
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Publication No.: US07902858B2Publication Date: 2011-03-08
- Inventor: Shunji Kuwahara , Hiroki Fujisawa
- Applicant: Shunji Kuwahara , Hiroki Fujisawa
- Applicant Address: JP Chuo-ku, Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Chuo-ku, Tokyo
- Priority: JP2007-181359 20070710
- Main IPC: H03K17/16
- IPC: H03K17/16 ; H03K19/003 ; H03K5/12

Abstract:
A calibration circuit includes: a replica buffer that drives a calibration terminal; a pre-emphasis circuit connected in parallel to the replica buffer; and an up-down counter that changes impedances of the replica buffer and the pre-emphasis circuit. A replica control circuit causes the replica buffer to conduct based on an impedance code, and a pre-emphasis control circuit causes the pre-emphasis circuit to conduct in an initial stage of a conducting period of the replica buffer. Thereby, even when an external resistor is shared among a plurality of semiconductor devices, for example, a voltage appearing in the calibration terminal can be stabilized at a higher speed.
Public/Granted literature
- US20090015312A1 Calibration circuit, semiconductor device including the same, and memory module Public/Granted day:2009-01-15
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