Invention Grant
US07903017B2 Comparator for a pipelined analog-to-digital converter and related signal sampling method 有权
用于流水线模数转换器和相关信号采样方法的比较器

  • Patent Title: Comparator for a pipelined analog-to-digital converter and related signal sampling method
  • Patent Title (中): 用于流水线模数转换器和相关信号采样方法的比较器
  • Application No.: US12549363
    Application Date: 2009-08-28
  • Publication No.: US07903017B2
    Publication Date: 2011-03-08
  • Inventor: Yi-Bin HsiehHeng-Chih Lin
  • Applicant: Yi-Bin HsiehHeng-Chih Lin
  • Applicant Address: TW Jhubei, Hsinchu County
  • Assignee: Ralink Technology Corp.
  • Current Assignee: Ralink Technology Corp.
  • Current Assignee Address: TW Jhubei, Hsinchu County
  • Agent Winston Hsu; Scott Margo
  • Priority: TW98124079A 20090716
  • Main IPC: H03M1/38
  • IPC: H03M1/38
Comparator for a pipelined analog-to-digital converter and related signal sampling method
Abstract:
A comparator for a pipelined ADC includes a sampling circuit coupled to a plurality of differential input voltages and a plurality of differential reference voltages, for sampling the plurality of differential input voltages according to a first clock signal and sampling the plurality of differential reference voltages according to a second clock signal, a preamplifier coupled to the sampling circuit comprising a positive input terminal, a negative input terminal, a positive output terminal, and a negative output terminal, for amplifying a voltage across the positive input terminal and the negative input terminal for generating a plurality of differential output voltages, and a latch circuit coupled to the preamplifier for latching the plurality of differential output voltages.
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