Invention Grant
- Patent Title: Adjustment of divided clock in disk head read circuit
- Patent Title (中): 磁头阅读电路中分频时钟的调整
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Application No.: US11879487Application Date: 2007-07-17
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Publication No.: US07903359B1Publication Date: 2011-03-08
- Inventor: Yat-Tung Lam
- Applicant: Yat-Tung Lam
- Applicant Address: BM Hamilton
- Assignee: Marvell International Ltd.
- Current Assignee: Marvell International Ltd.
- Current Assignee Address: BM Hamilton
- Main IPC: G11B5/09
- IPC: G11B5/09

Abstract:
A read circuit for providing multi-bit disk data to a disk controller in correspondence to analog data from a disk head, includes a low frequency clock generator whose phase is adjustable in response to a detection of the synchronization marker in the analog disk data. A high frequency clock is phase-locked to the output of the disk head, and synchronizes operation of an A/D converter and a bit detector which produces a verified single-bit based on the A/D output. A serial-to-parallel converter converts the single bit output from the bit detector to a parallel output, and the parallel output is latched to multi-bit disk data for use by the disk controller in accordance with a low frequency clock. The low frequency clock is generated by a clock generator from the high frequency clock with a phase that is adjustable in response to the synchronization mark detector.
Information query
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