Invention Grant
US07903560B2 Correlation technique for determining relative times of arrival/departure of core input/output packets within a multiple link-based computing system
有权
用于确定多个基于链路的计算系统内的核心输入/输出分组的到达/离开的相对时间的相关技术
- Patent Title: Correlation technique for determining relative times of arrival/departure of core input/output packets within a multiple link-based computing system
- Patent Title (中): 用于确定多个基于链路的计算系统内的核心输入/输出分组的到达/离开的相对时间的相关技术
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Application No.: US11026907Application Date: 2004-12-30
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Publication No.: US07903560B2Publication Date: 2011-03-08
- Inventor: Richard J. Glass
- Applicant: Richard J. Glass
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: H04L1/00
- IPC: H04L1/00 ; H04J1/16
Abstract:
A method is described that comprises receiving a timing exposure packet having timestamp information. The timestamp information identifies a cycle of a clock signal at which the packet was made available for transfer from a core to a physical layer within a component of a link-based computing system. The packet having been transmitted from the physical layer and also having phase information. The phase information identifies a cycle of the clock signal at which the packet was transferred from the core to the physical layer.
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