A controllable delay element is coupled in parallel with a calibration circuit. The calibration circuit receives a periodic reference signal and generates a series of sample voltages responsive to a time-varying analog voltage, the periodic reference signal, and the delayed periodic signal at the output of the controllable delay element. The calibration circuit distributes the series of sampled voltages for determining the components of a first vector. The first vector components are used to calculate the phase that results from a control signal applied to the controllable delay element. After the control signal is modified, a second vector is used to calculate the phase that results from the control signal. The delay can be determined by the product of the period of the reference signal and the difference in phase.