Invention Grant
- Patent Title: Compound instructions in a multi-threaded processor
- Patent Title (中): 多线程处理器中的复合指令
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Application No.: US12228669Application Date: 2008-08-13
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Publication No.: US07904702B2Publication Date: 2011-03-08
- Inventor: Peter Leaback , Morrie Berglas
- Applicant: Peter Leaback , Morrie Berglas
- Applicant Address: GB Kings Langley, Hertfordshire
- Assignee: Imagination Technologies Limited
- Current Assignee: Imagination Technologies Limited
- Current Assignee Address: GB Kings Langley, Hertfordshire
- Agency: Flynn, Theil, Boutell & Tanis, P.C.
- Priority: GB0715824.9 20070814
- Main IPC: G06F9/48
- IPC: G06F9/48

Abstract:
A multi-threaded processor determines which threads to execute, switches between execution of threads in dependence on the determination, each thread being coupled to a respective register for storing the state of the thread and used in executing instructions on the thread and includes a further register shared by all the threads. The executing threads use the further register to improve execution performance and prevents the switching of execution to another thread while the internal register is in use.
Public/Granted literature
- US20090063824A1 Compound instructions in a multi-threaded processor Public/Granted day:2009-03-05
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