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US07904742B2 Local skew detecting circuit for semiconductor memory apparatus 有权
半导体存储装置局部偏斜检测电路

Local skew detecting circuit for semiconductor memory apparatus
Abstract:
A local skew detecting circuit for a semiconductor integrated circuit includes a reference delay block that receives a test signal and generates a reference delay signal by delaying the test signal by a predetermined delay time, and a first timing detecting block coupled with the reference delay block, the first timing detecting block configured to receive the test signal, generate a first delay signal by delaying the test signal by the same predetermined delay time, and detect an enable timing order of the reference delay signal and the first delay signal to generate a first detection signal.
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