A serial concatenated convolutional code (SCCC) decoder is provided. The SCCC decoder includes an input buffer memory one or more processing loop modules, and an output buffer memory. Each processing loop module includes a permutation module, inner decoding engines, a depermutation module, and outer decoding engines. The depermutation module includes a concatenating device and two or more depermutation buffer memories. The concatenating device is configured for writing a codeword segment containing a plurality of soft-decision bits to each of the depermutation buffer memories in a single write operation. The permutation module also includes a concatenating device and two or more permutation buffer memories. The concatenating device is configured for writing a codeword segment containing a plurality of soft-decision bits to each of the depermutation buffer memories in a single write operation.