A method of constructing an integrated circuit involves selecting modular tiles and then generating a functional circuit layout using the tiles. Modular tiles that perform predetermined functions and that have approximately the same length and width dimensions are selected from a library of validated tiles. The tiles have input-output terminals embedded in their upper active layers. A functional circuit layout for the integrated circuit is generated using the tiles. In many implementations, the physical layout of the integrated circuit does not include the step of routing. Then an interconnect layer is added over the functional circuitry of the tiles and connects the input-output terminals to bond pads located at the perimeter of the functional circuit layout. Chip data corresponding to the functional circuit layout is generated, and then mask reticles corresponding to the chip data are generated. The integrated circuit is formed on a wafer based on the mask reticles.