Invention Grant
US07906433B2 Semiconductor device having wirings formed by damascene and its manufacture method
有权
具有由镶嵌形成的布线的半导体器件及其制造方法
- Patent Title: Semiconductor device having wirings formed by damascene and its manufacture method
- Patent Title (中): 具有由镶嵌形成的布线的半导体器件及其制造方法
-
Application No.: US11515202Application Date: 2006-09-05
-
Publication No.: US07906433B2Publication Date: 2011-03-15
- Inventor: Michio Oryoji , Hisaya Sakai
- Applicant: Michio Oryoji , Hisaya Sakai
- Applicant Address: JP Yokohama
- Assignee: Fujitsu Semiconductor Limited
- Current Assignee: Fujitsu Semiconductor Limited
- Current Assignee Address: JP Yokohama
- Agency: Fujitsu Patent Center
- Priority: JP2006-076422 20060320
- Main IPC: H01L21/311
- IPC: H01L21/311
Abstract:
A via hole is formed in the interlayer insulating film on a semiconductor substrate, the via hole reaching the bottom of the interlayer insulating film. A filling member fills a lower partial space in the via hole. A wiring trench continuous with the via hole as viewed in plan is formed, the wiring trench reaching partway in a thickness direction. The wiring trench is formed under the condition that an etching rate of the interlayer insulating film is faster than that of the filling member, in such a manner that a height difference between the upper surface of the filling member and the bottom of the wiring trench is half or less than half the maximum size of a plan shape of the via hole. The filling member in the via hole is removed. The inside of the via hole and wiring trench is filled with a conductive member.
Public/Granted literature
- US20070218671A1 Semiconductor device having wirings formed by damascene and its manufacture method Public/Granted day:2007-09-20
Information query
IPC分类:
