Invention Grant
- Patent Title: Semiconductor device and a manufacturing method thereof
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Application No.: US12767842Application Date: 2010-04-27
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Publication No.: US07906435B2Publication Date: 2011-03-15
- Inventor: Nobuyasu Nishiyama
- Applicant: Nobuyasu Nishiyama
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2006-168171 20060616
- Main IPC: H01L21/302
- IPC: H01L21/302 ; H01L21/461

Abstract:
A semiconductor device includes at least two adjacent memory cell blocks, each of the memory cell blocks having a plurality of memory cell units, each of memory cell units having a plurality of electrically reprogrammable and erasable memory cells connected in series, a plurality of cell gates for selecting the plurality of memory cells within the two adjacent memory cell blocks, each of the plurality of cell gates being formed with roughly rectangular closed loops or roughly U shaped open loops, each of the loops being connected to a corresponding cell of the memory cells in a corresponding memory cell unit of the plurality of memory cell units within one of the two adjacent memory cell blocks and being connected to a corresponding memory cell of the memory cells in a corresponding memory cell unit of the plurality of memory cell units within the other memory cell block of the two adjacent memory cell blocks and a plurality of pairs of first and second selection gates for selecting the memory cell block, the plurality of cell gates being located between one pair of the first and second selection gates within a corresponding block of the memory cell block.
Public/Granted literature
- US20100203728A1 SEMICONDUCTOR DEVICE AND A MANUFACTURING METHOD THEREOF Public/Granted day:2010-08-12
Information query
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