An analog-to-digital converter is disclosed. An input signal processor sets a voltage of an input signal as an initial value of a signal voltage Vin, subtracts ½n of an input range from the nth (n is a positive integer) signal voltage based on a comparison result output from a comparator, and outputs the (n+1)th signal voltage. A reference voltage source outputs a reference voltage to be compared with the signal voltage output from the input signal processor, the reference voltage being obtained by repeatedly reducing by one half the input range. A comparator compares the signal voltage from the input signal processor with the reference voltage from the reference voltage source.