This disclosure concerns a memory including cell blocks, wherein in a first write sequence for writing data to a first cell block, drivers write the data only to memory cells arranged in a form of a checkered flag among the memory cells included in the first cell block, in a second write sequence for writing the data from the first cell block to a second cell block, the drivers write the data to all memory cells connected to a word line selected in the second cell block, and when the data is read from the first cell block or at a time of data verification when data is written to the first cell block, the word line drivers simultaneously apply a read voltage to two adjacent word lines, and the sense amplifiers detects the data in the memory cells connected to the two word lines.