Invention Grant
US07908465B1 Hardware emulator having a selectable write-back processor unit 有权
硬件仿真器具有可选择的回写处理器单元

Hardware emulator having a selectable write-back processor unit
Abstract:
A method and apparatus for emulating a hardware design comprising an instruction execution unit for executing at least one instruction, a memory for providing data to the instruction execution unit for processing into an output bit, and a write enable logic for controlling writing the output bit from the instruction execution unit to the memory. In this manner, the output bit produced by the instruction execution unit executing an instruction may be selectably stored in memory to facilitate efficient processing of conditional emulation operations.
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