The disclosure describes a computing system having one or more processing elements, one of which is a floating point processor, a memory, and a multitask controller. The multitask controller includes a scheduler unit, a data flow unit, an executive unit, and a resource manager unit. The memory has two interfaces. One interface connects to a host processor and the other interface connects to the data flow unit of the controller so that the memory appears intelligent. The resource manager in the controller finds a processing element, such as a floating point element, that is available to perform a function for a task and assigns it to a task. The scheduler unit selects a task and an assigned processing element to carry out the function of the cuffent task, the results of which are placed back in the memory.