Invention Grant
- Patent Title: Synchronization method and program for a parallel computer
- Patent Title (中): 并行计算机的同步方法和程序
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Application No.: US11312345Application Date: 2005-12-21
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Publication No.: US07908604B2Publication Date: 2011-03-15
- Inventor: Koichi Takayama , Hidetaka Aoki
- Applicant: Koichi Takayama , Hidetaka Aoki
- Applicant Address: JP Tokyo
- Assignee: Hitachi, Ltd.
- Current Assignee: Hitachi, Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Brundidge & Stanger, P.C.
- Priority: JP2005-072633 20050315
- Main IPC: G06F9/46
- IPC: G06F9/46

Abstract:
Barrier synchronization between multiprocessors is performed at high speed while reducing overhead of parallel processing without adding any special hardware mechanism. A parallel computer synchronization method is provided to synchronize threads through barrier synchronization for parallel execution of plural threads on plural processor modules. The parallel computer has plural processor modules (P0 and P1) equipped with plural processor cores (cpu0 to cpu3). The processor cores are each assigned plural threads (Th0 to Th7) to execute multithread processing. The plural threads (Th0 to Th7) are set in hierarchical groups (Gr), and barrier synchronization is performed on each group separately.
Public/Granted literature
- US20060212868A1 Synchronization method and program for a parallel computer Public/Granted day:2006-09-21
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