Invention Grant
- Patent Title: Termination resistance adjusting circuit
- Patent Title (中): 端接电阻调节电路
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Application No.: US12774341Application Date: 2010-05-05
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Publication No.: US07915913B2Publication Date: 2011-03-29
- Inventor: Masashi Nakata
- Applicant: Masashi Nakata
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: Young & Thompson
- Priority: JP2009-119671 20090518
- Main IPC: H03K17/16
- IPC: H03K17/16 ; H03K19/094

Abstract:
A termination resistance adjusting circuit includes a first termination resistor circuit, a second termination resistor circuit connected in parallel with the first termination resistor circuit, a resistor circuit for adjustment that adjusts resistances of the first and second termination resistor circuits, a first amplifier circuit that receives a first voltage determined by the resistor circuit for adjustment and a second voltage determined by a reference resistor connected externally, equalizes the first and second voltages, and outputs a resistance adjusting signal to the first and second termination resistor circuits, first and second terminals connected to the first and second termination resistor circuits respectively, and a second amplifier circuit that receives a voltage based on a common voltage of a differential signal supplied to the first and second terminals, and the first or second voltage, and equalizes the voltage based on the common voltage and the first or second voltage.
Public/Granted literature
- US20100289521A1 TERMINATION RESISTANCE ADJUSTING CIRCUIT Public/Granted day:2010-11-18
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