A semiconductor memory device can determine whether control for supplying termination resistances is normally performed or not by applying a test signal. The device includes a termination resistance driving controller configured to receive a plurality of termination resistance setting signals in synchronization with an external clock and a delay locked loop (DLL) clock to output a plurality of pre-driving signals and a plurality of termination resistance driving signals for a predetermined time. A data pre-driver is configured to output data in synchronization with the external clock. A test driving detector is configured to drive output nodes to a predetermined voltage level in response to a test signal and the plurality of pre-driving signals. A data output buffer is configured to apply termination resistances corresponding to the plurality of termination resistance driving signals to input/output pads, and output the data from the output nodes to the input/output pads.