Method of manufacturing a transistor in semiconductor device having a gate electrode located between the trenches formed in low-concentration regions of the source and drain regions including high-concentration regions formed at the bottom of the trenches

Invention Grant

US07919380B2 Method of manufacturing a transistor in semiconductor device having a gate electrode located between the trenches formed in low-concentration regions of the source and drain regions including high-concentration regions formed at the bottom of the trenches 有权

Title translation: 制造半导体器件中的晶体管的方法，其具有位于形成在沟槽底部的高浓度区域的源极和漏极区域的低浓度区域中形成的沟槽之间的栅电极，

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Patent Title: Method of manufacturing a transistor in semiconductor device having a gate electrode located between the trenches formed in low-concentration regions of the source and drain regions including high-concentration regions formed at the bottom of the trenches
Patent Title (中): 制造半导体器件中的晶体管的方法，其具有位于形成在沟槽底部的高浓度区域的源极和漏极区域的低浓度区域中形成的沟槽之间的栅电极，
Application No.: US12704402

Application Date: 2010-02-11
Publication No.: US07919380B2

Publication Date: 2011-04-05
Inventor: Nam Kyu Park
Applicant: Nam Kyu Park
Applicant Address: KR Cheongju-Si, Chungcheongbuk-Do
Assignee: Magnachip Semiconductor, Ltd.
Current Assignee: Magnachip Semiconductor, Ltd.
Current Assignee Address: KR Cheongju-Si, Chungcheongbuk-Do
Agency: Lowe Hauptman Ham & Berner, LLP
Priority: KR2003-57120 20030819
Main IPC: H01L21/265
IPC: H01L21/265 ; H01L29/784

Method of manufacturing a transistor in semiconductor device having a gate electrode located between the trenches formed in low-concentration regions of the source and drain regions including high-concentration regions formed at the bottom of the trenches

Abstract:

The present invention relates to a transistor in a semiconductor device and method of manufacturing the same. Trenches are formed in a semiconductor substrate at gate edges. Low-concentration impurity regions are then formed at the sidewalls and the bottoms of the trenches. High-concentration impurity regions are formed at the bottoms of the trenches in a depth shallower than the low-concentration impurity regions. Source/drain consisting of the low-concentration impurity regions and the high-concentration impurity regions are thus formed. Therefore, the size of the transistor can be reduced while securing a stabilized operating characteristic even at high voltage. It is thus possible to improve reliability of the circuit and the degree of integration in the device.

Abstract(Chinese):

本发明涉及一种半导体器件中的晶体管及其制造方法。沟槽在栅极边缘处形成在半导体衬底中。然后在沟槽的侧壁和底部形成低浓度杂质区。在深度比低浓度杂质区浅的深度，在沟槽底部形成高浓度杂质区。由此形成由低浓度杂质区域和高浓度杂质区域构成的源极/漏极。因此，即使在高电压下也能够确保稳定的工作特性，可以减小晶体管的尺寸。因此，可以提高电路的可靠性和装置的集成度。

Public/Granted literature

US20100144109A1 TRANSISTOR IN A SEMICONDUCTOR SUBSTRATE HAVING HIGH-CONCENTRATION SOURCE AND DRAIN REGION FORMED AT THE BOTTOM OF A TRENCH ADJACENT TO THE GATE ELECTRODE Public/Granted day:2010-06-10

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/18	...器件有由周期表Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体，如掺杂材料
H01L21/26	....用波或粒子辐射轰击的
H01L21/263	.....带有高能辐射的（H01L21/261优先）
H01L21/265	......产生离子注入的