Invention Grant
- Patent Title: Semiconductor device and method for fabricating the same
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US11372374Application Date: 2006-03-10
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Publication No.: US07919822B2Publication Date: 2011-04-05
- Inventor: Hitoshi Asada
- Applicant: Hitoshi Asada
- Applicant Address: JP Yokohama
- Assignee: Fujitsu Semiconductor Limited
- Current Assignee: Fujitsu Semiconductor Limited
- Current Assignee Address: JP Yokohama
- Agency: Fujitsu Patent Center
- Priority: JP2005-254729 20050902
- Main IPC: H01L21/02
- IPC: H01L21/02

Abstract:
A semiconductor device that suppresses variation and a drop in the breakdown voltage of transistors. In the semiconductor device in which a logic transistor and a high-breakdown-voltage transistor are formed on one Si substrate, an insulating film which has an opening region and which is thick around the opening region is formed on a low concentration drain region formed in the Si substrate on one side of a gate electrode of the high-breakdown-voltage transistor. The insulating film around the opening region has a two-layer structure including a gate insulating film and a sidewall insulating film. When ion implantation is performed on the low concentration drain region beneath the opening region to form a high concentration drain region, the insulating film around the opening region prevents impurities from passing through. This eliminates variation in the relative positions of the opening region and a place where the high concentration drain region is formed, and the high concentration drain region can be formed on a self align basis with respect to the low concentration drain region.
Public/Granted literature
- US20070052038A1 Semiconductor device and method for fabricating the same Public/Granted day:2007-03-08
Information query
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