Invention Grant
- Patent Title: Stacked semiconductor component having through wire interconnect
- Patent Title (中): 具有通过电线互连的堆叠半导体部件
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Application No.: US12703551Application Date: 2010-02-10
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Publication No.: US07919846B2Publication Date: 2011-04-05
- Inventor: David R. Hembree
- Applicant: David R. Hembree
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agent Stephen A. Gratton
- Main IPC: H01L21/44
- IPC: H01L21/44

Abstract:
A stacked semiconductor component includes a plurality of semiconductor substrates in a stacked array and a continuous wire extending through aligned vias on the semiconductor substrates of the stacked array in electrical contact with contacts on the semiconductor substrates. A method for fabricating the semiconductor component includes the steps of stacking the semiconductor substrates in a stacked array with aligned vias; threading a wire through the aligned vias; and forming a plurality of electrical connections between the wire and the contacts on the semiconductor substrates.
Public/Granted literature
- US20100140753A1 Stacked Semiconductor Component Having Through Wire Interconnect And Method Of Fabrication Public/Granted day:2010-06-10
Information query
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