A semiconductor wafer includes a plurality of chip areas, a scribe line area, a bonding pad, a probing pad, and a pad connection wiring. The plurality of chip areas are configured to be arranged in a matrix form. The scribe line area is configured to separate the plurality of chip areas from each other. The bonding pad is configured to be connected with an external terminal. The probing pad is configured to be contacted with a probe wire. The pad connection wiring is configured to electrically connect the bonding pad to the probing pad. The bonding pad and the probing pad are located at a predetermined distance from each other in each of the plurality of chip areas. The pad connection wiring has a portion located in the scribe line area.