Invention Grant
- Patent Title: Semiconductor integrated circuit device
- Patent Title (中): 半导体集成电路器件
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Application No.: US12427308Application Date: 2009-04-21
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Publication No.: US07920014B2Publication Date: 2011-04-05
- Inventor: Kazuhito Nagashima , Takashi Muto
- Applicant: Kazuhito Nagashima , Takashi Muto
- Applicant Address: JP Tokyo
- Assignee: Hitachi, Ltd.
- Current Assignee: Hitachi, Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Miles & Stockbridge P.C.
- Priority: JP2008-110834 20080422
- Main IPC: H03K17/56
- IPC: H03K17/56

Abstract:
In order to transfer data at high speed over a long distance, a current mode logic output circuit (CML) having a large number of taps, high accuracy, and a wide switchable range of the amount of pre-emphasis is needed. However, when the amount of emphasis is set by adding unit source-coupled pair circuits, a problem will arise that the output capacitance of the current mode logic output circuit would increase, thus hampering high-speed transmission. An output circuit of the invention is constructed from unit source-coupled pair circuits 501, which are obtained by dividing a current mode logic output circuit (CML) into m groups, terminal resistors 502, and a data selector 504. The amount of emphasis of each tap is determined by the ratio of the number of unit source-coupled pair circuits, which have been obtained by dividing the CML into m groups, allocated to each tap. Thus, the amount of emphasis can be set to be any arbitrary amount without a change in the output amplitude of 1. As a result, the transmission speed can be increased and the transmission distance can be extended.
Public/Granted literature
- US20090261880A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE Public/Granted day:2009-10-22
Information query
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