Invention Grant
- Patent Title: Booster circuit
- Patent Title (中): 增压电路
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Application No.: US12836122Application Date: 2010-07-14
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Publication No.: US07920018B2Publication Date: 2011-04-05
- Inventor: Seiji Yamahira
- Applicant: Seiji Yamahira
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2007-007694 20070117; JP2007-307064 20071128
- Main IPC: G05F1/10
- IPC: G05F1/10

Abstract:
A boosting circuit comprises a first boosting cell row and a second boosting cell row. The boosting circuit further comprises an analog comparison circuit for comparing the potential of boosting cells on the same stage, and selecting and outputting the lower or higher of the potentials. The potential of an N well is controlled using the output potential of the analog comparison circuit. Thereby, the amplitude of an N well potential can be suppressed, and a single N well region can be shared.
Public/Granted literature
- US20100277228A1 BOOSTER CIRCUIT Public/Granted day:2010-11-04
Information query
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