Invention Grant
- Patent Title: Unified architecture for folding ADC
- Patent Title (中): 用于折叠ADC的统一架构
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Application No.: US12660743Application Date: 2010-03-03
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Publication No.: US07920084B2Publication Date: 2011-04-05
- Inventor: Robert Callaghan Taft
- Applicant: Robert Callaghan Taft
- Applicant Address: US CA Santa Clara
- Assignee: National Semiconductor Corporation
- Current Assignee: National Semiconductor Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H03M1/12
- IPC: H03M1/12

Abstract:
A system, apparatus and method for a folding analog-to-digital converter (ADC) are described. The general architecture of the folding ADC includes an array (1-N) of cascaded folding amplifier stages, a distributed array of fine comparators, and an encoder. Each folding amplifier stage includes folding amplifiers that are configured to receive inputs from a prior stage, and also generate output signals for the next stage. The folding amplifiers output signals for a given stage are evaluated by a corresponding comparator stage, which may include multiple comparators, and also optionally coupled to an interpolator. The outputs of the comparators from all stages are collectively evaluated by the encoder, which generates the output of the folding ADC. Unlike conventional folding ADCs that require fine and coarse channels, the presently described folding ADC provides conversion without the need for a coarse channel. The encoder can also be arranged to facilitate recursive error correction.
Public/Granted literature
- US20100156691A1 Unified architecture for folding ADC Public/Granted day:2010-06-24
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