Invention Grant
- Patent Title: ROM cell array structure
- Patent Title (中): ROM单元阵列结构
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Application No.: US12039711Application Date: 2008-02-28
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Publication No.: US07920403B2Publication Date: 2011-04-05
- Inventor: Jhon Jhy Liaw
- Applicant: Jhon Jhy Liaw
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: K&L Gates LLP
- Main IPC: G11C17/00
- IPC: G11C17/00

Abstract:
A semiconductor memory cell array is disclosed which comprises an elongated continuous active region, a first transistor formed in the elongated continuous active region, the first transistor forming a first single-transistor memory cell, a second transistor also formed in the elongated continuous active region, the second transistor forming a second single-transistor memory cell and being the closest memory cell to the first single-transistor memory cell along the elongated direction, and an isolation gate formed on the elongated continuous active region between the first and second transistor, wherein the isolation gate has substantially the same structure as gates of the first and second transistor, and is supplied with a predetermined voltage to shut off any active current across a section of the elongated continuous active region beneath the isolation gate.
Public/Granted literature
- US20080170426A1 Novel ROM Cell Array Structure Public/Granted day:2008-07-17
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